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Welcome to GAPH Home Page

The Hardware Design Support Group (GAPH)* has as general objective the research and development of methods and tools for the design, implementation and validation of electronic systems, especially with the use of integrated circuits (ICs). Much of our current research addresses multiprocessor systems-on-chip (MPSoCs), non-synchronous circuits (either GALS and fully asynchronous), and networks on chip (NoCs).

Do not miss ATLAS, our open source environment for NoC generation, traffic generation for NoCs, NoC simulation and NoC performance evaluation. Also, do not miss our experimental, open source synthesizable Multiprocessor System on a Chip HeMPS and ASCEnD, a method to support the construction of standard-cell libraries for building asynchronous integrated circuits. The latter has been used to create several library instances, based on real or predictive process design kits, such as ASCEnD-ST65, ASCEnD-FreePDK45 and the soon to come ASCEND-TSMC180. See our GAPH Asynchronous Circuits Research Page for more information.

The ASCEnD-FreePDK45 library will be available soon!


ASCEnD-FreePDK45 is an open source standard cell library to support the design of asynchronous circuits. This first release of the library contains 30 different cells and is based on the FreePDK45 design kit, a predictive 45nm technology. Currently, the ASCEnD-FreePDK45 library supports both NCL and SDDS-NCL asynchronous design templates and is fully compatible with the NanGate FreePDK45 open cell library.

Due to several coherence problems in V1.0 of this library, we have temporarily removed access to it. If you have interest in this ASCEnD-FreePDK45, please contact Ney Calazans.




DAC 2014 University Booth Videos (Req. Adobe flash player installed/enabled)


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To view general data about the GAPH Group, it is also possible to take a look at the CNPq (external link) Brazilian Research Groups Database description of the GAPH in the following link (external link). It contains information (in Portuguese) about the member composition of the group, its associated research subjects and cooperation issues.

GAPH Research Interest Areas

  • SoC Design Methods - with emphasis on MPSoCs
  • Asynchronous and GALS Circuit Design and Test Methods
  • Asynchronous Resilient Architectures
  • Reliability in Embedded Systems
  • IP Cores Communication Strategy - Networks on Chip (NoCs)
  • FPGA-based Rapid Prototyping
  • Microelectronics
  • Embedded Systems

IP Core Development - Digital hardware design is one of our main specialties, with emphasis on some application types, including:

  • IPs targeted to Telecommunication Systems (Ethernet, SDH, E1, etc.)
  • Programmable Cores (soft core processors)
  • Cryptography

Reconfigurable Systems, Dynamic and Partial Reconfiguration - This has once been our main research interest but is currently a secondary subject area

  • CAD for Partial and Dynamic Reconfiguration
  • Interconnection Strategies used for IP Cores Communication



We currently have University Program Agreements with the following CAD tool vendors.
















We also employ the technology libraries from the following IC prototyping service providers.









Please, download the GAPH/GSE Flyer for a summary of the GAPH and of our brother research group, the Embedded Systems Group (GSE).

*GAPH is an acronym originated from the portuguese denomination of our research group: Grupo de Apoio ao Projeto de Hardware


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